General11.08.2009

New AMD processors in SA

Dual core Turion and Athlon designed for embedded applications

AMD today announced immediate availability of two new dual-core, 18W TDP processors for the ASB1 BGA embedded client platform.

The AMD Turion Neo X2 processor Model L625 and the AMD Athlon Neo X2 processor Model L325 deliver PC-caliber performance in a very low power envelope and with an embedded-friendly ball grid array (BGA) package.

This embedded client solution is ideal for traditional embedded applications such as single board computing and thin client systems, as well as markets for self-service kiosks, point of sale machines and digital signage.  The ball grid array (BGA) package helps alleviate potential reliability issues for systems that are deployed in rugged environments and has a low z-height that is designed to enable thin, compact enclosures.

The addition of these new dual-core processors to the ASB1 BGA platform can help increase the performance of existing single-core designs.  When combined with either the AMD 780E or M690E chipset, embedded system designers can take advantage of a complete x86-based solution that can help streamline development, minimise time to market and offers leading-edge graphics capability, which is increasingly important in many embedded markets.  All of AMD’s embedded products are offered with industry-standard 5-year component longevity.

Systems based on the new dual-core processors are expected at launch from industry-leading embedded system providers IBASE and IEI, among others.

“We are committed to helping simplify the development cycle for our embedded customers with a platform that readily addresses the shifting needs of their markets,” said Buddy Broeker, director, Embedded Computing Solutions Division, AMD.  “Systems such as digital signage, point of sale, and thin clients require PC-class performance and a rich graphics experience.   Our ASB1 BGA platform is a ready-to-go, one-stop solution for these markets and at the same time offers the flexibility of multiple CPU and chipset choices.”

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